A High-Resolution Non-Volatile Analog Memory Cell - Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on

A 3-transistor non-volatile analog storage cell with 14 bits effective resolution and railto-rail buffered voltage output is presented. The memory, which consists of charge stored on a MOS transistor floating gate, is written by means of hotelectron injection and erased by means of gate oxide tunneling. The circuit allows simultaneous memory reading and writing; by writing the memory under feedback control, errors due to oxide mismatch or trapping can be nearly eliminated. Small size and low power consumption make the cell especially attractive for use in analog neural networks. The cell is fabricated in a 2 μm n-well silicon Bi-CMOS process available from MOSIS.